Backgating effect in III-V MESFET's: A physical model
Identifieur interne : 000191 ( Main/Repository ); précédent : 000190; suivant : 000192Backgating effect in III-V MESFET's: A physical model
Auteurs : RBID : Pascal:14-0025778Descripteurs français
- Pascal (Inist)
- Surface arrière, Transistor effet champ barrière Schottky, Barrière Schottky, Canal n, Simulation numérique, Méthode analytique, Mobilité dérive, Transport charge, Charge espace, Electron libre, Niveau profond, Champ électrique, Mobilité porteur charge, Effet Gunn, Seuil tension, Durabilité, Technologie MOS, Transistor MOSFET, Silicium, Semiconducteur type n, Phosphure d'indium, Composé binaire, Couche tampon, Fiabilité, InP.
English descriptors
- KwdEn :
- Analytical method, Back surface, Binary compound, Buffer layer, Charge carrier mobility, Charge transport, Deep level, Drift mobility, Durability, Electric field, Free electron, Gunn effect, Indium phosphide, MOS technology, MOSFET, Metal semiconductor field effect transistor, Numerical simulation, Reliability, Schottky barrier, Silicon, Space charge, Voltage threshold, n channel, n type semiconductor.
Abstract
The backgating (sidegating) effect in III-V MESFET's devices is analyzed through the modelisation of a Metal (Schottky barrier)-N (channel)-SI (Semi Insulating)-N+ (back-gate contact) structure. Numerical and analytical results, using the drift-diffusion charge transport model, show that along the applied voltage range associated with backgating: (i) quasi space charge neutrality across most of the bulk SI layer and (ii) quasi Boltzmann equilibrium for the free electron across the reverse biased N (channel)-SI contact prevail for GaAs (SI) or InP (SI). The circumstances under which a negative bias applied on the back-gate (N+) contact will either develop across the reverse biased N-SI contact (strong backgating) or across the SI layer (negligible backgating) are described by means of a simple analytical relation as a function of the deep level parameters values. The electric field dependence of the carrier mobility (Gunn effect) produces a backgating effect with a threshold voltage. The presence of a low lifetime, buffer layer, at the N-SI interface is shown to strongly reduce it.
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<record><TEI><teiHeader><fileDesc><titleStmt><title xml:lang="en" level="a">Backgating effect in III-V MESFET's: A physical model</title><author><name sortKey="Manifacier, J C" uniqKey="Manifacier J">J. C. Manifacier</name><affiliation wicri:level="3"><inist:fA14 i1="01"><s1>LE.S. - Université des Sciences et Techniques - Montpellier II, Place Eugène Bataillon</s1><s2>34095 Montpellier</s2><s3>FRA</s3><sZ>1 aut.</sZ><sZ>2 aut.</sZ></inist:fA14><country>France</country><placeName><region type="region" nuts="2">Languedoc-Roussillon</region><settlement type="city">Montpellier</settlement></placeName></affiliation></author><author><name sortKey="Ardebili, R" uniqKey="Ardebili R">R. Ardebili</name><affiliation wicri:level="3"><inist:fA14 i1="01"><s1>LE.S. - Université des Sciences et Techniques - Montpellier II, Place Eugène Bataillon</s1><s2>34095 Montpellier</s2><s3>FRA</s3><sZ>1 aut.</sZ><sZ>2 aut.</sZ></inist:fA14><country>France</country><placeName><region type="region" nuts="2">Languedoc-Roussillon</region><settlement type="city">Montpellier</settlement></placeName></affiliation></author></titleStmt><publicationStmt><idno type="inist">14-0025778</idno><date when="2014">2014</date><idno type="stanalyst">PASCAL 14-0025778 INIST</idno><idno type="RBID">Pascal:14-0025778</idno><idno type="wicri:Area/Main/Corpus">000280</idno><idno type="wicri:Area/Main/Repository">000191</idno></publicationStmt><seriesStmt><idno type="ISSN">0038-1101</idno><title level="j" type="abbreviated">Solid-state electron.</title><title level="j" type="main">Solid-state electronics</title></seriesStmt></fileDesc><profileDesc><textClass><keywords scheme="KwdEn" xml:lang="en"><term>Analytical method</term><term>Back surface</term><term>Binary compound</term><term>Buffer layer</term><term>Charge carrier mobility</term><term>Charge transport</term><term>Deep level</term><term>Drift mobility</term><term>Durability</term><term>Electric field</term><term>Free electron</term><term>Gunn effect</term><term>Indium phosphide</term><term>MOS technology</term><term>MOSFET</term><term>Metal semiconductor field effect transistor</term><term>Numerical simulation</term><term>Reliability</term><term>Schottky barrier</term><term>Silicon</term><term>Space charge</term><term>Voltage threshold</term><term>n channel</term><term>n type semiconductor</term></keywords><keywords scheme="Pascal" xml:lang="fr"><term>Surface arrière</term><term>Transistor effet champ barrière Schottky</term><term>Barrière Schottky</term><term>Canal n</term><term>Simulation numérique</term><term>Méthode analytique</term><term>Mobilité dérive</term><term>Transport charge</term><term>Charge espace</term><term>Electron libre</term><term>Niveau profond</term><term>Champ électrique</term><term>Mobilité porteur charge</term><term>Effet Gunn</term><term>Seuil tension</term><term>Durabilité</term><term>Technologie MOS</term><term>Transistor MOSFET</term><term>Silicium</term><term>Semiconducteur type n</term><term>Phosphure d'indium</term><term>Composé binaire</term><term>Couche tampon</term><term>Fiabilité</term><term>InP</term></keywords></textClass></profileDesc></teiHeader><front><div type="abstract" xml:lang="en">The backgating (sidegating) effect in III-V MESFET's devices is analyzed through the modelisation of a Metal (Schottky barrier)-N (channel)-SI (Semi Insulating)-N<sup>+</sup> (back-gate contact) structure. Numerical and analytical results, using the drift-diffusion charge transport model, show that along the applied voltage range associated with backgating: (i) quasi space charge neutrality across most of the bulk SI layer and (ii) quasi Boltzmann equilibrium for the free electron across the reverse biased N (channel)-SI contact prevail for GaAs (SI) or InP (SI). The circumstances under which a negative bias applied on the back-gate (N<sup>+</sup>) contact will either develop across the reverse biased N-SI contact (strong backgating) or across the SI layer (negligible backgating) are described by means of a simple analytical relation as a function of the deep level parameters values. The electric field dependence of the carrier mobility (Gunn effect) produces a backgating effect with a threshold voltage. The presence of a low lifetime, buffer layer, at the N-SI interface is shown to strongly reduce it.</div></front></TEI><inist><standard h6="B"><pA><fA01 i1="01" i2="1"><s0>0038-1101</s0></fA01><fA03 i2="1"><s0>Solid-state electron.</s0></fA03><fA05><s2>91</s2></fA05><fA08 i1="01" i2="1" l="ENG"><s1>Backgating effect in III-V MESFET's: A physical model</s1></fA08><fA11 i1="01" i2="1"><s1>MANIFACIER (J. C.)</s1></fA11><fA11 i1="02" i2="1"><s1>ARDEBILI (R.)</s1></fA11><fA14 i1="01"><s1>LE.S. - Université des Sciences et Techniques - Montpellier II, Place Eugène Bataillon</s1><s2>34095 Montpellier</s2><s3>FRA</s3><sZ>1 aut.</sZ><sZ>2 aut.</sZ></fA14><fA20><s1>13-18</s1></fA20><fA21><s1>2014</s1></fA21><fA23 i1="01"><s0>ENG</s0></fA23><fA43 i1="01"><s1>INIST</s1><s2>2888</s2><s5>354000501613230030</s5></fA43><fA44><s0>0000</s0><s1>© 2014 INIST-CNRS. All rights reserved.</s1></fA44><fA45><s0>22 ref.</s0></fA45><fA47 i1="01" i2="1"><s0>14-0025778</s0></fA47><fA60><s1>P</s1></fA60><fA61><s0>A</s0></fA61><fA64 i1="01" i2="1"><s0>Solid-state electronics</s0></fA64><fA66 i1="01"><s0>GBR</s0></fA66><fC01 i1="01" l="ENG"><s0>The backgating (sidegating) effect in III-V MESFET's devices is analyzed through the modelisation of a Metal (Schottky barrier)-N (channel)-SI (Semi Insulating)-N<sup>+</sup> (back-gate contact) structure. Numerical and analytical results, using the drift-diffusion charge transport model, show that along the applied voltage range associated with backgating: (i) quasi space charge neutrality across most of the bulk SI layer and (ii) quasi Boltzmann equilibrium for the free electron across the reverse biased N (channel)-SI contact prevail for GaAs (SI) or InP (SI). The circumstances under which a negative bias applied on the back-gate (N<sup>+</sup>) contact will either develop across the reverse biased N-SI contact (strong backgating) or across the SI layer (negligible backgating) are described by means of a simple analytical relation as a function of the deep level parameters values. The electric field dependence of the carrier mobility (Gunn effect) produces a backgating effect with a threshold voltage. The presence of a low lifetime, buffer layer, at the N-SI interface is shown to strongly reduce it.</s0></fC01><fC02 i1="01" i2="X"><s0>001D03F04</s0></fC02><fC03 i1="01" i2="X" l="FRE"><s0>Surface arrière</s0><s5>01</s5></fC03><fC03 i1="01" i2="X" l="ENG"><s0>Back surface</s0><s5>01</s5></fC03><fC03 i1="01" i2="X" l="SPA"><s0>Superficie atrás</s0><s5>01</s5></fC03><fC03 i1="02" i2="X" l="FRE"><s0>Transistor effet champ barrière Schottky</s0><s5>02</s5></fC03><fC03 i1="02" i2="X" l="ENG"><s0>Metal semiconductor field effect transistor</s0><s5>02</s5></fC03><fC03 i1="02" i2="X" l="SPA"><s0>Transistor efecto campo barrera Schottky</s0><s5>02</s5></fC03><fC03 i1="03" i2="X" l="FRE"><s0>Barrière Schottky</s0><s5>03</s5></fC03><fC03 i1="03" i2="X" l="ENG"><s0>Schottky barrier</s0><s5>03</s5></fC03><fC03 i1="03" i2="X" l="SPA"><s0>Barrera Schottky</s0><s5>03</s5></fC03><fC03 i1="04" i2="X" l="FRE"><s0>Canal n</s0><s5>04</s5></fC03><fC03 i1="04" i2="X" l="ENG"><s0>n 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